Table of Contents

DiscOsci

Luis Diego Soto Ugalde B26613

Introduction

The main goal of this project is to develop an oscilloscope using the stm32f429discovery microcontroller.This is a report on the first stage of the project.It includes the configuration of the micrcontroller's developing framework as well as attempted suppor for the LCD-TFT.

You can find the original work proposal here DiscOsci (Spanish).

You can find the slideshow here DiscOsci-Slideshow (English).

Objectives

General objectives

To develop an oscilloscope using the stm32f429discovery

Specific objectives

  1. To configure the stm32f429discovery's development framework.
  2. To improve libopencm3's support of the stm32f429discovery, specifically the LCD screen , the input device and USB communication.

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Configuring the microcontroller's developing framework

The following tools were installed succesfully:

  1. ARM toolchain
  2. Stlink
  3. Libopencm3

Directories named local/src and local/DIR were used during the installation of the aforementioned tools.

ARM toolchain

First,the following packages were installed: 

$ sudo apt-get install libftdi1 openocd

Then, multiarch was set in the system: 

$  dpkg --add-architecture i386

The previous command adds the architecture i386 to /var/lib/dpkg/arch. Then the file /etc/apt/sources.list was modified in the following way for each source repository: 

$ deb [arch=amd64,i386] http://site.example.com/debian distribution

The following package was installed 

$ sudo apt-get install libncurses5:i386

The installation tarball for the GNU tools was downloaded and decompressed. 

$ cd ~/local/src
$ wget https://launchpad.net/gcc-arm-embedded/4.8/4.8-2014-q2-update/+download/gcc-arm-none-eabi-4_8-2014q2-20140609-linux.tar.bz2
$ tar -xjf gcc-arm-none-eabi-4_-2018q2-20140609-linux.tar.bz2

The toolchain executables were added to the PATH environmental variable. 

$ echo 'export PATH=$PATH:/home/****user****/local/src/gcc-arm-none-eabi-4_8-20142/bin/' >> /home/****user****/.bashrc

Then the .bashrc file was reloaded. 

$ . .bashrc

Stlink was used to communitcate with the microcontroller through USB. Xstow was used during stlink's installation, more info can be found here.The library libusb-1.0 was installed.Also pkg-config and autoconf were installed. 

$ sudo apt-get install libsub-1.0 pkg-config autoconf

Once in the local/src directory, we clone stlink's git repository. 

$ cd ~/local/src/
$ git clone https://github.com/texane/stlink
$ cd stlink

The build system was prepared 

$ ./autogen.sh

Configuration step: 

$ ./configure --prefix=/home/**user**/local/DIR/stlink

Compilation and installation 

$ make
$ make install 
$ cd 
$ cd local/DIR
$ xstow stlink

Access the ~/local/src/stlink directory and copy the following rules. 

$ sudo cp 49-stlinkv1.rules /etc/udev/rules.d/
$ sudo cp 49-stlinkv2.rules /etc/udev/rules.d/
$ sudo /etc/init.d/udev restart

Libopencm3

Libopencm stands for Libraryopencortexm-3 The Cortex M-3 is a 32-bit ARM microprocessor used in microcontrollers and embedded systems in general.Its low cost makes development of high-performance real-time applications more accessible.

The package python-yaml was installed. 

$ sudo apt-get install python-yaml

Then the directory ~/local/src was accessed and the library's git repository was cloned. 

$ cd ~/local/src
$ git clone https://github.com/libopencm3/libopencm3-examples

The library was built 

$ cd libopencm3-examples
$ git submodule init
$ git submodule update
$ cd libopencm3
$ make

Building and flashing an example to the microcontroller:

cd ~/local/src/libopencm3-examples/stm32/f4/stm32f4-discovery/miniblink/ 

make
make flash

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Working on libopencm3

Libopencm3's structure for stm32 devices

This picture shows the library's structure for stm32 devices. There's a main header for each function (GPIOs,LCD,etc.)that selects the respective header based on the device's architecture (f0,f1,f2,f3,f4). There also are common headers that support different architecture.

Support for the LCD screen

LCD set up

Steps to set up the LCD:

  1. Enable the GPIOs' clock and LTDC's clock.
  2. Set the GPIOs' respesctive alternate function.
  3. Configure the LCD's registers as desired.

LCD synchronization parameters

These parameters are used to set the active display area.

LCD layers

Two layers and a background that can be enabled and blended at will.

lcd.h

As explained before, two header files were created. The first one in the ~/local/src/libopencm3-examples/libopencm3/include/libopencm3/stm32 directory and the second one in the ~/local/src/libopencm3-examples/libopencm3/include/libopencm3/stm32/f4 directory. In order to comply with the library's pre-established naming standards both were named lcd.h 

#include <libopencm3/cm3/common.h>
#include <libopencm3/stm32/memorymap.h>
 
 
#if defined(STM32F4)
#       include <libopencm3/stm32/f4/lcd.h>
#else
#       error "stm32 family not defined."
#endif

The second header was created in the ~/local/src/libopencm3-examples/libopencm3/include/libopencm3/stm32/f4 directory .This header maps all the registers related to the discovery's screen as well as each register's flags and shifts. 

#ifndef LIBOPENCM3_LCD_H
#define LIBOPENCM3_LCD_H
 
#define  LTDC_SSCR MMIO32(LCD_TFT_BASE + 0x08)
#define  LTDC_BPCR MMIO32(LCD_TFT_BASE + 0x0C)
#define  LTDC_AWCR MMIO32(LCD_TFT_BASE + 0x10)
#define  LTDC_TWCR MMIO32(LCD_TFT_BASE + 0x14)
#define  LTDC_GCR MMIO32(LCD_TFT_BASE + 0x18)
#define  LTDC_SRCR MMIO32(LCD_TFT_BASE + 0x24)
#define  LTDC_BCCR MMIO32(LCD_TFT_BASE + 0x2C)
#define  LTDC_IER MMIO32(LCD_TFT_BASE + 0x34)
#define  LTDC_ISR MMIO32(LCD_TFT_BASE + 0x38)
#define  LTDC_ICR MMIO32(LCD_TFT_BASE + 0x3C)
#define  LTDC_LIPCR MMIO32(LCD_TFT_BASE + 0x40)
#define  LTDC_CPSCR MMIO32(LCD_TFT_BASE + 0x44)
#define  LTDC_CDSR MMIO32(LCD_TFT_BASE + 0x48)
#define  LTDC_L1CR MMIO32(LCD_TFT_BASE + 0x84)
#define  LTDC_L2CR MMIO32(LCD_TFT_BASE + 0x104)
#define  LTDC_L1WHPCR MMIO32(LCD_TFT_BASE + 0x88)
#define  LTDC_L2WHPCR MMIO32(LCD_TFT_BASE + 0x108)
#define  LTDC_L1WVPCR MMIO32(LCD_TFT_BASE + 0x8C)
#define  LTDC_L2WVPCR MMIO32(LCD_TFT_BASE + 0x10C)
#define  LTDC_L1CKCR MMIO32(LCD_TFT_BASE + 0x90)
#define  LTDC_L2CKCR MMIO32(LCD_TFT_BASE + 0x110)
#define  LTDC_L1PFCR MMIO32(LCD_TFT_BASE + 0x94)
#define  LTDC_L2PFCR MMIO32(LCD_TFT_BASE + 0x114)
#define  LTDC_L1CACR MMIO32(LCD_TFT_BASE + 0x98)
#define  LTDC_L2CACR MMIO32(LCD_TFT_BASE + 0x118)
#define  LTDC_L1DCCR MMIO32(LCD_TFT_BASE + 0x9C)
#define  LTDC_L2DCCR MMIO32(LCD_TFT_BASE + 0x11C)
#define  LTDC_L1BFCR MMIO32(LCD_TFT_BASE + 0xA0)
#define  LTDC_L2BFCR MMIO32(LCD_TFT_BASE + 0x120)
#define  LTDC_L1CFBAR MMIO32(LCD_TFT_BASE + 0xAC)
#define  LTDC_L2CFBAR MMIO32(LCD_TFT_BASE + 0x12C)
#define  LTDC_L1CFBLR MMIO32(LCD_TFT_BASE + 0xB0)
#define  LTDC_L2CFBLR MMIO32(LCD_TFT_BASE + 0x130)
#define  LTDC_L1CFBLNR MMIO32(LCD_TFT_BASE + 0xB4)
#define  LTDC_L2CFBLNR MMIO32(LCD_TFT_BASE + 0x134)
#define  LTDC_L1CLUTWR MMIO32(LCD_TFT_BASE + 0xC4)
#define  LTDC_L2CLUTWR MMIO32(LCD_TFT_BASE + 0xCC)
 
/*--------------   LTDC_SSCR VALUES ------------ */
#define LTDC_SSCR_HSW_SHIFT             16
#define LTDC_SSCR_VSH_SHIFT             0
/*--------------   LTDC_BPCR VALUES ------------ */
#define LTDC_BPCR_AHBP_SHIFT          16
#define LTDC_BPCR_AVBP_SHIFT           0
/*-------------- LTDC_AWCR VALUES------------*/
#define LTDC_AWCR_AAW_SHIFT                  16
#define LTDC_AWCR_AAH_SHIFT                   0
/*-------------- LTDC_TWCR VALUES------------*/
#define LTDC_TWCR_TOTALW_SHIFT                   16
#define LTDC_TWCR_TOTALH_SHIFT                   0
/*------------ LTDC_GCR ----------------------*/
#define LTDC_GCR_HSPOL               (1<<31)
#define LTDC_GCR_VSPOL                (1<<30)
#define LTDC_GCR_DEPOL                (1<<29)
#define LTDC_GCR_PCPOL                  (1<<28)
#define LTDC_GCR_DEN                  (1<<16)
#define LTDC_GCR_DRW_SHIFT                12
#define LTDC_GCR_DGW_SHIFT                  8
#define LTDC_GCR_DBW_SHIFT                  4
#define LTDC_GCR_LTDCEN                  (1<<0)
/*-----------------------LTDC_SRCR-------------------*/
 
#define LTDC_SRCR_VBR                        (1<<1)
#define LTDC_SRCR_IMR                        (1<<0)
 
/*-----------------------LTDC_BCCR-------------------*/
#define LTDC_BCCR_BCRED_SHIFT                    16
#define LTDC_BCCR_BCGREEN_SHIFT                    8
#define LTDC_BCCR_BCBLUE_SHIFT                    0
/*-------------------------LTDC_IER ---------------*/
#define LTDC_IER_RRIE                        (1<<3)
#define LTDC_IER_TERRIE                        (1<<2)
#define LTDC_IER_FUIE                       (1<<1)
#define LTDC_IER_LIE                        (1<<0)
/*-------------------------LTDC_ISR ---------------*/
#define LTDC_ISR_RRIF                       (1<<3)
#define LTDC_ISR_TERRIF                        (1<<2)
#define LTDC_ISR_FUIF                     (1<<1)
#define LTDC_ISR_LIF                        (1<<0)
/*-------------------------LTDC_ICR ---------------*/
#define LTDC_ICR_CRRIF                       (1<<3)
#define LTDC_ICR_CTERRIF                        (1<<2)
#define LTDC_ICR_CFUIF                     (1<<1)
#define LTDC_ICR_CLIF                        (1<<0)
/*-------------------------LTDC_LIPCR ---------------*/
#define LTDC_LIPCR_LIPOS_SHIFT                      0
/*-------------------------LTDC_CPSR ---------------*/
#define LTDC_CPSR_ CXPOS_SHIFT                      16
#define LTDC_CPSR_CYPOS_SHIFT                       0
 
/*-------------------------LTDC_CDSRR ---------------*/
#define LTDC_CDSR_HSYNCS                      (1<<3)
#define LTDC_CDSR_VSYNCS                       (1<<2)
#define LTDC_CDSR_HDES                    (1<<1)
#define LTDC_CDSR_VDES                        (1<<0)
 
/*---------LTDC_L1CR----------------*/
#define LTDC_L1CR_CLUTEN                                (1<<4)
#define LTDC_L1CR_CLOCKEN                                  (1<<1)
#define LTDC_L1CR_LEN                                    (1<<0)
/*---------LTDC_L1WHPCR----------------*/
#define LTDC_L1WHPCR_WHSPPOS_SHIFT                              16
#define LTDC_L1WHPCR_WHSTPOS_SHIFT                                0
/*---------LTDC_L1WVPCR----------------*/
#define LTDC_L1WVPCR_WVSPPOS_SHIFT                              16
#define LTDC_L1WVPCR_WVSTPOS_SHIFT                                0
/*---------LTDC_L1CKCR----------------*/
#define LTDC_L1CKCR_CKRED_SHIFT                              16
#define LTDC_L1CKCR_CKGREEN_SHIFT                                8
#define LTDC_L1CKCR_CKBLUE_SHIFT                                0
/*---------LTDC_L1PFCR----------------*/
#define LTDC_L1PFCR_PF_SHIFT                                0
/*---------LTDC_L1CACR----------------*/
#define LTDC_L1CACR_CONSTA_SHIFT                                0
/*---------LTDC_L1DCCR----------------*/
#define LTDC_L1DCCR_DCALPHA_SHIFT                                24
#define LTDC_L1DCCR_DCRED_SHIFT                                16
#define LTDC_L1DCCR_DCGREEN_SHIFT                                8
#define LTDC_L1DCCR_DCBLUE_SHIFT                                0
/*---------LTDC_L1BFCR----------------*/
#define LTDC_L1BFCR_BF1_SHIFT                                8
#define LTDC_L1BFCR_BF2_SHIFT                                0
/*---------LTDC_L1CFBAR----------------*/
#define LTDC_L1CFBAR_CFBADD_SHIFT                                0
/*---------LTDC_L1CFBLR----------------*/
#define LTDC_L1CFBLR_CFBP_SHIFT                                16
#define LTDC_L1CFBLR_CFBLL_SHIFT                                0
/*---------LTDC_L1CFBLNR----------------*/
#define LTDC_L1CFBLNR_CFBLNBR_SHIFT                                0
/*---------LTDC_L1CLUTWR----------------*/
#define LTDC_L1CLUTWT_CLUTADD_SHIFT                                24
#define LTDC_L1CLUTWT_RED_SHIFT                                16
#define LTDC_L1CLUTWT_GREEN_SHIFT                                8
#define LTDC_L1CLUTWT_BLUE_SHIFT								 0
/*---------LTDC_L2CR----------------*/
#define LTDC_L2CR_CLUTEN                                (1<<4)
#define LTDC_L2CR_CLOCKEN                                  (1<<1)
#define LTDC_L2CR_LEN                                    (1<<0)
/*---------LTDC_L2WHPCR----------------*/
#define LTDC_L2WHPCR_WHSPPOS_SHIFT                              16
#define LTDC_L2WHPCR_WHSTPOS_SHIFT                                0
/*---------LTDC_L2WVPCR----------------*/
#define LTDC_L2WVPCR_WHSPPOS_SHIFT                              16
#define LTDC_L2WVPCR_WHSTPOS_SHIFT                                0
/*---------LTDC_L2CKCR----------------*/
#define LTDC_L2CKCR_CKRED_SHIFT                              16
#define LTDC_L2CKCR_CKGREEN_SHIFT                                8
#define LTDC_L2CKCR_CKBLUE_SHIFT                                0
/*---------LTDC_L2PFCR----------------*/
#define LTDC_L2PFCR_PF_SHIFT                                0
/*---------LTDC_L2CACR----------------*/
#define LTDC_L2CACR_CONSTA_SHIFT                                0
/*---------LTDC_L2DCCR----------------*/
#define LTDC_L2DCCR_DCALPHA_SHIFT                                24
#define LTDC_L2DCCR_DCRED_SHIFT                                16
#define LTDC_L2DCCR_DCGREEN_SHIFT                                8
#define LTDC_L2DCCR_DCBLUE_SHIFT                                0
/*---------LTDC_L2BFCR----------------*/
#define LTDC_L2BFCR_BF1_SHIFT                                8
#define LTDC_L2BFCR_BF2_SHIFT                                0
/*---------LTDC_L2CFBAR----------------*/
#define LTDC_L2CFBAR_CFBADD_SHIFT                                0
/*---------LTDC_L2CFBLR----------------*/
#define LTDC_L2CFBLR_CFBP_SHIFT                                16
#define LTDC_L2CFBLR_CFBLL_SHIFT                                0
/*---------LTDC_L2CFBLNR----------------*/
#define LTDC_L2CFBLNR_CFBLNBR_SHIFT                                0
/*---------LTDC_L2CLUTWR----------------*/
#define LTDC_L2CLUTWT_CLUTADD_SHIFT                                24
#define LTDC_L2CLUTWT_RED_SHIFT                                16
#define LTDC_L2CLUTWT_GREEN_SHIFT                                8
#define LTDC_L2CLUTWT_BLUE_SHIFT							     0
#endif

In the same directory, file rcc.h was edited to support the RCC_APB2ENR_LTDCEN flag.

Prueba.c

This code was suppossed to set the layer1 to purple and the background color to navy blue.Then it would blend both colors inside an active window of resolution 630 x 460. The procedure to control the LCD is as follows:

  1. Based on the device's datasheet certain GPIOs must be enabled and set as alternate function.
  2. Each activated pin must have its alternate function configured to the values specified in the datasheet.
  3. Then the LCD's registers can be configured

Here's the file and its makefile.

Makefile 

BINARY = prueba
 
LDSCRIPT = ../stm32f4-discovery.ld
 
include ../../Makefile.include

Code 

#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/lcd.h>
#include <libopencm3/stm32/gpio.h>
 
static void setup(void)
{
	uint32_t rccdkcr,rcc_pl,sscr,bpcr,awcr,twcr, backcol,gcr,srcr,l1whpcr,l1wvpcr,l1pfcr,l1cfbar,l1cfblr,l1cfblnr,l1cr,l2dccr,l1dccr,l1cacr,l1bfcr;
	//Clock enabling
	rcc_periph_clock_enable(RCC_GPIOG);
	rcc_periph_clock_enable(RCC_GPIOF);
	rcc_periph_clock_enable(RCC_GPIOA);
	rcc_periph_clock_enable(RCC_GPIOB);
	rcc_periph_clock_enable(RCC_GPIOC);
	rcc_periph_clock_enable(RCC_GPIOD);
	rcc_periph_clock_enable(RCC_GPIOE);
	rcc_periph_clock_enable(RCC_GPIOH);
	rcc_periph_clock_enable(RCC_GPIOI);
	rcc_periph_clock_enable(RCC_LTDC);
	// Gpio mode setup				
	gpio_mode_setup(GPIOG, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO13);
	gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO3);
	gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO4);
	gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO6);
	gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
	gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12);
	gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO0);
	gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO1);
	gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8);
	gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9);
	gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10);
	gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
	gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2);
	gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO6);
	gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO7);
	gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10);
	gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO3);
	gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO6);
	gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
	gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12);
	gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO13);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO4);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO5);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO6);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO13);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO14);
	gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO15);
	gpio_mode_setup(GPIOF, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8);
	gpio_mode_setup(GPIOF, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9);
	gpio_mode_setup(GPIOF, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10);
	gpio_mode_setup(GPIOG, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO6);
	gpio_mode_setup(GPIOG, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO7);
	gpio_mode_setup(GPIOG, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10);
	gpio_mode_setup(GPIOG, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
	gpio_mode_setup(GPIOG, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO3);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10);		
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);		
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO13);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO14);
	gpio_mode_setup(GPIOH, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO15);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO0);	
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO1);	
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2);		
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO4);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO5);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO6);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO7);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO13);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO14);
	gpio_mode_setup(GPIOI, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO15);			
 
	//Setting the alternate function for each GPIO											
	gpio_set_af(GPIOA, GPIO_AF14, GPIO3);
	gpio_set_af(GPIOA, GPIO_AF14, GPIO4);
	gpio_set_af(GPIOA, GPIO_AF14, GPIO6);
	gpio_set_af(GPIOA, GPIO_AF14, GPIO11);
	gpio_set_af(GPIOA, GPIO_AF14, GPIO12);
	gpio_set_af(GPIOB, GPIO_AF9, GPIO0);
	gpio_set_af(GPIOB, GPIO_AF9, GPIO1);
	gpio_set_af(GPIOB, GPIO_AF14, GPIO8);
	gpio_set_af(GPIOB, GPIO_AF14, GPIO9);
	gpio_set_af(GPIOB, GPIO_AF14, GPIO10);
	gpio_set_af(GPIOB, GPIO_AF14, GPIO11);
	/*gpio_set_af(GPIOC, GPIO_AF14, GPIO2);*/
	gpio_set_af(GPIOC, GPIO_AF14, GPIO6);
	gpio_set_af(GPIOC, GPIO_AF14, GPIO7);
	gpio_set_af(GPIOC, GPIO_AF14, GPIO10);
	gpio_set_af(GPIOD, GPIO_AF14, GPIO3);
	gpio_set_af(GPIOD, GPIO_AF14, GPIO6);
	gpio_set_af(GPIOD, GPIO_AF14, GPIO10);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO4);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO5);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO6);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO11);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO12);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO13);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO14);
	gpio_set_af(GPIOE, GPIO_AF14, GPIO15);
	gpio_set_af(GPIOF, GPIO_AF5, GPIO7);
	gpio_set_af(GPIOF, GPIO_AF14, GPIO8);
	gpio_set_af(GPIOF, GPIO_AF5, GPIO9);
	gpio_set_af(GPIOF, GPIO_AF14, GPIO10);				
	gpio_set_af(GPIOG, GPIO_AF5, GPIO7);
	gpio_set_af(GPIOG, GPIO_AF14, GPIO8);
	gpio_set_af(GPIOG, GPIO_AF5, GPIO9);
	gpio_set_af(GPIOG, GPIO_AF14, GPIO10);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO2);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO3);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO8);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO9);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO10);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO11);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO12);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO13);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO14);
	gpio_set_af(GPIOH, GPIO_AF14, GPIO15);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO0);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO1);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO2);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO4);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO5);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO6);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO7);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO9);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO10);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO12);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO13);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO14);
	gpio_set_af(GPIOI, GPIO_AF14, GPIO15);
 
	rcc_pl = RCC_PLLSAICFGR;
	rcc_pl =  rcc_pl | (2 << RCC_PLLSAICFGR_PLLSAIR_SHIFT);
	RCC_PLLSAICFGR=rcc_pl;
 
	rccdkcr = RCC_DCKCFGR;
	rccdkcr |= ( 5 << RCC_DCKCFGR_PLLSAIDIVR_SHIFT) ;
	RCC_DCKCFGR =rccdkcr;
 
	sscr=LTDC_SSCR;
	sscr &= 0;
	sscr = sscr |  (0x7 << LTDC_SSCR_HSW_SHIFT) | (0x3 << LTDC_SSCR_VSH_SHIFT);
	LTDC_SSCR= sscr;
 
	bpcr=LTDC_BPCR;
	bpcr &= 0;
	bpcr = bpcr | (0xE << LTDC_BPCR_AHBP_SHIFT) | (0x5 << LTDC_BPCR_AVBP_SHIFT);
	LTDC_BPCR= bpcr;
 
	awcr=LTDC_AWCR;
	awcr &=0;
	awcr = awcr | ( 0x28E << LTDC_AWCR_AAW_SHIFT) | ( 0x1E5 << LTDC_AWCR_AAH_SHIFT);
	LTDC_AWCR=awcr;
 
	twcr=LTDC_TWCR;
	twcr &=0;
	twcr =  twcr | ( 0x294 << LTDC_TWCR_TOTALW_SHIFT) | ( 0x1E7 << LTDC_TWCR_TOTALH_SHIFT) ;
	LTDC_TWCR=twcr;
 
	gcr=LTDC_GCR;
	gcr &= 0;
	gcr = gcr | LTDC_GCR_HSPOL | LTDC_GCR_VSPOL | LTDC_GCR_DEPOL | LTDC_GCR_PCPOL;
	LTDC_GCR=gcr;
 
	backcol=LTDC_BCCR;
	backcol &=0;
	backcol = backcol | ( 100 << LTDC_BCCR_BCBLUE_SHIFT) | ( 50 << LTDC_BCCR_BCGREEN_SHIFT) | ( 25 << LTDC_BCCR_BCRED_SHIFT);
	LTDC_BCCR=backcol;
 
	l1whpcr=LTDC_L1WHPCR;
	l1whpcr &=0;
	l1whpcr = l1whpcr | (0x14 << LTDC_L1WHPCR_WHSTPOS_SHIFT) | (0x28A << LTDC_L1WHPCR_WHSPPOS_SHIFT);
	LTDC_L1WHPCR=l1whpcr;
 
	l1wvpcr=LTDC_L1WVPCR;
	l1wvpcr &=0;
	l1wvpcr = l1wvpcr | (0xE << LTDC_L1WVPCR_WVSTPOS_SHIFT) | (0x1DA << LTDC_L1WVPCR_WVSPPOS_SHIFT);
	LTDC_L1WVPCR=l1wvpcr;
 
	l1pfcr=LTDC_L1PFCR;
	l1pfcr &=0;
	l1pfcr = l1pfcr | ( 1 << LTDC_L1PFCR_PF_SHIFT);
	LTDC_L1PFCR=l1pfcr;
 
	l1cfbar=LTDC_L1CFBAR;
	l1cfbar &=0;
	l1cfbar = l1cfbar | (0x20000000 << LTDC_L1CFBAR_CFBADD_SHIFT);
	LTDC_L1CFBAR=l1cfbar;
 
	l1cfblr=LTDC_L1CFBLR;
	l1cfblr &=0;
	l1cfblr = l1cfblr | 0x03C003C3;
	LTDC_L1CFBLR=l1cfblr;
 
	l1cfblnr=LTDC_L1CFBLNR;
	l1cfblnr &=0;
	l1cfblnr = l1cfblnr | ( 8 << LTDC_L1CFBLNR_CFBLNBR_SHIFT);
	LTDC_L1CFBLNR=l1cfblnr;
 
	l1cacr=LTDC_L1CACR;
	l1cacr &=0;
	l1cacr = l1cacr | ( 128 << LTDC_L1CACR_CONSTA_SHIFT);
	LTDC_L1CACR=l1cacr;
 
	l1dccr=LTDC_L1DCCR;
	l1dccr &=0 ;
	l1dccr = l1dccr | ( 128 << LTDC_L1DCCR_DCALPHA_SHIFT)| ( 70 << LTDC_L1DCCR_DCBLUE_SHIFT) | ( 50 << LTDC_L1DCCR_DCGREEN_SHIFT)  | ( 60 << LTDC_L1DCCR_DCRED_SHIFT) ;
	LTDC_L1DCCR=l1dccr;
 
	l2dccr=LTDC_L2DCCR;
	l2dccr &=0 ;
	l2dccr |= ( 128 << LTDC_L2DCCR_DCALPHA_SHIFT)| ( 230 << LTDC_L2DCCR_DCBLUE_SHIFT) | ( 30 << LTDC_L2DCCR_DCGREEN_SHIFT)  | ( 130 << LTDC_L1DCCR_DCRED_SHIFT) ;
	LTDC_L2DCCR=l2dccr;
 
	l1bfcr=LTDC_L1BFCR;
	l1bfcr &=0;
	l1bfcr = l1bfcr | ( 4 << LTDC_L1BFCR_BF1_SHIFT) | ( 4 << LTDC_L1BFCR_BF2_SHIFT);
	LTDC_L1BFCR=l1bfcr;
 
	l1cr=LTDC_L1CR;
	l1cr &=0;
	l1cr = l1cr | ( LTDC_L1CR_LEN ) | ( LTDC_L1CR_CLOCKEN);
	LTDC_L1CR=l1cr;
 
	srcr=LTDC_SRCR;
	srcr &=0;
	srcr = srcr | LTDC_SRCR_IMR;
	LTDC_SRCR=srcr;
 
	gcr=LTDC_GCR;
	gcr &=0;
	gcr = gcr | LTDC_GCR_DEN;
	LTDC_GCR=gcr;
 
 
}	
 
int main(void)
{	
	int i;
	setup();
 
	while (1) {
 
		gpio_toggle(GPIOG, GPIO13);	
		for (i = 0; i < 1000000; i++) {	
			__asm__("nop");
		}
	}
 
	return 0;
}

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Conclusions

  1. The stm32f429discovery's developing framework was configured succesfully
  2. A lot was learned about microcontroller programming.
  3. Unfortunatedly, a test code showing the support added to the library didn't function.

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References

  1. Oscilloscope using an Stm32f429-Discovery
  2. Libopencm3's wiki
  3. Datasheets and manuals
  4. Another oscilloscope using a Stm32f429-Discovery
  5. Configuring the device's devoloping environment

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