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tutorials:pcb_design_tips
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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| tutorials:pcb_design_tips [2020/02/25 09:46] – [For open-coroco PWM] admin | tutorials:pcb_design_tips [2022/09/20 00:08] (current) – external edit 127.0.0.1 | ||
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| ===== For open-coroco PWM ===== | ===== For open-coroco PWM ===== | ||
| - | - Review and reconsider all design: done: | + | |
| - | - Current and voltage sensing with shunt resistors and GMR ICs: done | + | - Current and voltage sensing with shunt resistors and GMR ICs: done |
| - | - New stm32 pin usage to fit many analog ADC signals: done | + | - New stm32 pin usage to fit many analog ADC signals: done |
| - | - virtual neutral: done | + | - virtual neutral: done |
| - | - Download all datasheets: IR2110 and INA125, all other not checked: done | + | - Download all datasheets: IR2110 and INA125, all other not checked: done |
| - | - New ICs: ACS70331EE, MCP6V64-E_ST : done | + | - New ICs: ACS70331EE, MCP6V64-E_ST : done |
| - | - Check ICs functionality (datasheet): | + | - Check ICs functionality (datasheet): |
| - | - Component values checking: done (op-amp gain and offset resistor values missing) | + | - Component values checking: done (op-amp gain and offset resistor values missing) |
| - | - Create hierarchical sheets for each module: done | + | - Create hierarchical sheets for each module: done |
| - | - Check recommended circuitry for each module (datasheet): | + | - Check recommended circuitry for each module (datasheet): |
| - | - Create new IC symbols: done | + | - Create new IC symbols: done |
| - | - Check pins (names, numbers, pintypes): done | + | - Check pins (names, numbers, pintypes): done |
| - | - Create schematics: done | + | - Create schematics: done |
| - | - Check schematics: done | + | - Check schematics: done |
| - | - Anotate components: done | + | - Anotate components: done |
| - | - Create Part and Web component fields: done | + | - Create Part and Web component fields: done |
| - | - Set Part to manufacturer number and Web to distributor product webpage: done | + | - Set Part to manufacturer number and Web to distributor product webpage: done |
| - | - Check availability, | + | - Check availability, |
| - | - Availability: | + | - Availability: |
| - | - Check package sizing: done | + | - Check package sizing: done |
| - | - For capacitors, check (voltajes): done | + | - For capacitors, check (voltajes): done |
| - | - Try to select only one component for each main value (even if voltage is higher than necessary in some components): | + | - Try to select only one component for each main value (even if voltage is higher than necessary in some components): |
| - | - Assign corresponding footprints: done | + | - Assign corresponding footprints: done |
| - | - Check and modify footprints to allow handsoldering: | + | - Check and modify footprints to allow handsoldering: |
| - | - Start PCB: done | + | - Start PCB: done |
| - | - Set Design rules (Find all possible manufacturers and use the worse design rules from all the manufacturers combined): done | + | - Set Design rules (Find all possible manufacturers and use the worse design rules from all the manufacturers combined): done |
| - | - Make the biggest board size possible with the most affordable price to set a maximum size for the board using the Edge.Cuts layer: done | + | - Make the biggest board size possible with the most affordable price to set a maximum size for the board using the Edge.Cuts layer: done |
| - | - Don't forget the mounting holes for the boards: done | + | - Don't forget the mounting holes for the boards: done |
| - | - Set the global minimum design rules: done | + | - Set the global minimum design rules: done |
| - | - Set common track widths and via sizes (GND, Power lines, analog signals, digital signals, high voltage low amp, high voltage high amp): done | + | - Set common track widths and via sizes (GND, Power lines, analog signals, digital signals, high voltage low amp, high voltage high amp): done |
| - | - Use net classes for these common track widths: done | + | - Use net classes for these common track widths: done |
| - | - Read netlist: done | + | - Read netlist: done |
| - | - New: kicad 5.1.2: it uses a new command: " | + | - New: kicad 5.1.2: it uses a new command: " |
| - | - Caution: when re-reading the netlist or updating from schematic kicad resets the "keep upright" | + | - Caution: when re-reading the netlist or updating from schematic kicad resets the "keep upright" |
| - | - Assign all net points to net classes: done | + | - Assign all net points to net classes: done |
| - | - Draw drafts testing different configurations of main modules, taking into account power supply lines, analog signals, digital signals, different grounds and the layer to use in each in such a way to avoid interference and many other problems: done | + | - Draw drafts testing different configurations of main modules, taking into account power supply lines, analog signals, digital signals, different grounds and the layer to use in each in such a way to avoid interference and many other problems: done |
| - | - Position the biggest components, for each module first, then position components according to function and datasheet recommendations:: | + | - Position the biggest components, for each module first, then position components according to function and datasheet recommendations:: |
| - | - Construct schematic modules as PCB modules: done | + | - Construct schematic modules as PCB modules: done |
| - | - Move them to final position: done | + | - Move them to final position: done |
| - | - Connect them: done | + | - Connect them: done |
| - | - Create big GND and power lines: done | + | - Create big GND and power lines: done |
| - | - Create GND planes, move lines to allow planes to permate more: done | + | - Create GND planes, move lines to allow planes to permate more: done |
| - | - Do via stitching: done | + | - Do via stitching: done |
| - | - Do DRC checks: done | + | - Do DRC checks: done |
| - | - Add logos: done | + | - Add logos: done |
| - | - Relocate vias to not disturb logos: done | + | - Relocate vias to not disturb logos: done |
| - | - Relocate Silkscreen reference names: done | + | - Relocate Silkscreen reference names: done |
| - | - Create division lines to clarify and present modules location: done | + | - Create division lines to clarify and present modules location: done |
| - | - Add project name and board revision number: done | + | - Add project name and board revision number: done |
| - | - Check distances of external boards (in case of multiple connector external boards): done | + | - Check distances of external boards (in case of multiple connector external boards): done |
| - | - Assemble external boards with 3d viewer to check mechanical and assembly problems visually (pay attention to connectors and big components): | + | - Assemble external boards with 3d viewer to check mechanical and assembly problems visually (pay attention to connectors and big components): |
| - | - Check orientation of pins of stm32f4 in passthrough and all: done | + | - Check orientation of pins of stm32f4 in passthrough and all: done |
| - | - Annotate in PCB special pins used in open-coroco from stm32f4: done | + | - Annotate in PCB special pins used in open-coroco from stm32f4: done |
| - | - Edit Additional indication (port names) naming: done | + | - Edit Additional indication (port names) naming: done |
| - | - Add polarity symbols for ports: done | + | - Add polarity symbols for ports: done |
| - | - Buy all strange components first: done | + | - Buy all strange components first: done |
| - | - Generate fabrication files: done | + | - Generate fabrication files: done |
| - | - Add missing 3D models: done | + | - Add missing 3D models: done |
| + | - Use tolerances in the component properties (for resistors and relevant components) | ||
| + | - Use the minimum recomended voltages for capacitors in the component properties | ||
| - | - Use tolerances in the component properties | + | ===== For open-coroco resolver ===== |
| - | - Use the minimum | + | |
| + | - Review and reconsider all design: done | ||
| + | - New stm32 pin usage to fit PWM board usage and compatibility: | ||
| + | - Download all datasheets: almost ready | ||
| + | - Check ICs functionality | ||
| + | - Component values checking: done | ||
| + | - Create hierarchical sheets | ||
| + | - Check recommended circuitry for each module (datasheet): | ||
| + | - Create new IC symbols: done | ||
| + | - Check pins (names, numbers, pintypes): done | ||
| + | - Create schematics: done | ||
| + | - Check schematics: done | ||
| + | - Anotate components: done | ||
| + | - Create Part and Web component fields: done | ||
| + | - Set Part to manufacturer number and Web to distributor product webpage: done | ||
| + | - Check availability, | ||
| + | - Availability: | ||
| + | - Check package sizing: done | ||
| + | - For capacitors, check (voltajes): done | ||
| + | - Try to select only one component for each main value (even if voltage is higher than necessary in some components): done | ||
| + | - Assign corresponding footprints: done | ||
| + | - Check and modify footprints to allow handsoldering: | ||
| + | - Start PCB: done | ||
| + | - Set Design rules (Find all possible manufacturers and use the worse design rules from all the manufacturers combined): done | ||
| + | - Make the biggest board size possible with the most affordable price to set a maximum size for the board using the Edge.Cuts layer: done | ||
| + | - Copy the Edge.Cuts lines from the other .kicad_pcb file from another project to the current file in case that the same board size and shape is needed: done | ||
| + | - Don't forget the mounting holes for the boards: done | ||
| + | - Set the global | ||
| + | - Set common track widths and via sizes (GND, Power lines, analog signals, digital signals, high voltage low amp, high voltage high amp): done | ||
| + | - Use net classes | ||
| + | - Read netlist: done | ||
| + | - Assign all net points to net classes: done | ||
| + | - Draw drafts testing different configurations of main modules, taking into account power supply lines, analog signals, digital signals, different grounds and the layer to use in each in such a way to avoid interference and many other problems: done | ||
| + | - Position | ||
| + | - Construct schematic modules as PCB modules: done | ||
| + | - Move them to final position: done | ||
| + | - Connect them: done | ||
| + | - Create big GND and power lines: done | ||
| + | - Create GND planes, move lines to allow planes to permate more: done | ||
| + | - Do via stitching: done | ||
| + | - Do DRC checks: done | ||
| + | - Add logos: done | ||
| + | - Relocate vias to not disturb logos: done | ||
| + | - Relocate Silkscreen reference names: done | ||
| + | - Create division lines to clarify and present modules location: done | ||
| + | - Add project name and board revision number: done | ||
| + | - Check distances of external boards (in case of multiple connector external boards): done | ||
| + | - Assemble external boards with 3d viewer to check mechanical and assembly problems visually (pay attention to connectors and big components): | ||
| + | - Check orientation of pins of stm32f4 in passthrough and all: done | ||
| + | - Annotate in PCB pins used in stm32f4: done | ||
| + | - Edit Additional indication naming: done | ||
| + | - Add polarity symbols for ports: done | ||
| + | - Buy all strange components first: done | ||
| + | - Generate fabrication files: done | ||
| + | - Add missing 3D models: done | ||
tutorials/pcb_design_tips.1582623991.txt.gz · Last modified: 2022/09/20 00:08 (external edit)